Array substrate and curved display device

ABSTRACT

The Present disclosure relates to the field of display technology and discloses an array substrate and a curved display device which can solve the technical problem of dark area on both sides of the existing curved display device. The array substrate according to the present disclosure comprises a number of sub pixel units arranged as an array, each sub pixel unit comprising a main sub pixel, a secondary sub pixel and a voltage-dividing capacitor. Said array substrate is divided into a compensation region and a non-compensation region. The capacitance of the voltage-dividing capacitor of the sub pixel unit in the compensation region is smaller than that of the voltage-dividing capacitor of the sub pixel unit in the non-compensation region. The present disclosure is applicable to curved display devices such as curved television and curved display, etc.

The present disclosure claims benefit of Chinese patent application CN 201410252392.0, entitled “Array Substrate and Curved Display Device” and filed on Jun. 9, 2014, which is incorporated herein by reference.

TECHNICAL FIELD

The present disclosure relates to the technical field of display technology. Specifically, it relates to an array substrate and a curved display device.

TECHNICAL BACKGROUND

A curved display device comprises a display screen having a curved shape. Because pixels on the screen of the curved display device each can have the same distance from the human eyes, a true visual perception can be perfectly revivified. Thus, a curved display device is more competitive as compared with a traditional flat panel display device.

The process of manufacturing a curved display device comprises the following steps: separately manufacturing an array substrate and a color film substrate first; then assembling the array substrate and the color film substrate together to form a planar liquid crystal panel; and further bending the planar liquid crystal panel into an inwardly curved liquid crystal panel. A number of gate lines and data lines staggered with each other, as well as sub pixel units formed by the gate lines and data lines are arranged on the array substrate. A latticed black matrix and sub pixel units formed by the black matrix are arranged on the color film substrate. On the planar liquid crystal panel formed by assembling the array substrate and the color substrate, the position of the black matrix on the color film substrate corresponds to the position of the gate lines and data lines on the array substrate, so that the black matrix blocks the gate lines and data lines. The position of the sub pixel area on the color film substrate corresponds to that on the array substrate so as to form an aperture region of the curved display device.

However, two curved surfaces having the same shape will be formed respectively on the array substrate and the color film substrate after the planar liquid crystal panel is bent into a curved one. In this case, dislocations would occur between the color film substrate and the array substrate on both sides of the curved liquid crystal panel. In particular, the black matrix on both sides of the color film substrate would mismatch with the longitudinal data lines on the array substrate. Some of these data lines would be exposed outside the black matrix and thus block the sub pixel area on the color film substrate, causing a decrease of aperture ratio in this region and further resulting in dark area on both sides of the curved display device.

SUMMARY OF THE INVENTION

The present disclosure aims to provide an array substrate for solving the technical problem of dark area on both sides of the existing curved display device.

The present disclosure provides an array substrate comprising a number of sub pixel units arranged as an array, each sub pixel unit comprising a main sub pixel, a secondary sub pixel and a voltage-dividing capacitor,

wherein said array substrate is divided into a compensation region and a non-compensation region, and the capacitance of the voltage-dividing capacitor of the sub pixel unit in the compensation region is smaller than that of the voltage-dividing capacitor of the sub pixel unit in the non-compensation region.

Further, the compensation region is disposed at both sides of the array substrate.

Preferably, the compensation region is in the shape of an ellipse.

Further, the array substrate comprising a first gate line, a second gate line, and a common electrode line provided for each row of the sub pixel units, and

a data line provided for each column of the sub pixel units.

Further, a voltage-dividing electrode is arranged in each sub pixel unit, and said voltage-dividing capacitor is formed by the overlapping proportion between the voltage-dividing electrode and the common electrode line.

Further, the area of the voltage-dividing electrode of the sub pixel unit in the compensation region is smaller than that of the voltage-dividing electrode of the sub pixel unit in the non-compensation region.

Further, each sub pixel unit further comprises a first switching element, a second switching element, a third switching element, a main pixel electrode disposed inside the main sub pixel, and a secondary pixel electrode disposed inside the secondary sub pixel,

said first switching element is connected to the first gate line with its gate electrode, and to the data line with its source electrode, and to the main pixel electrode with its drain electrode,

said second switching element is connected to the first gate line with its gate electrode, and to the data line with its source electrode, and to the secondary pixel electrode with its drain electrode, and

said third switching element is connected to the second gate line with its gate electrode, and to the secondary pixel electrode with its source electrode, and to the voltage-dividing electrode with its drain electrode.

Preferably, the first switching element, the second switching element, and the third switching element are all thin film transistors.

The present disclosure further provides a curved display device comprising a color film substrate and said array substrate.

Preferably, said curved display device is a vertical alignment type display device.

The present disclosure achieves the following desirable effects: the compensation region on the array substrate according to the present disclosure is a region where dislocation occurs between the array substrate and the color film substrate, i.e. the region having a decreased aperture ratio; and the rest region of the panel having a normal aperture ratio is the non-compensation region. During displaying, the main sub pixel and the secondary sub pixel in each sub pixel unit of the array substrate are charged with the same data voltage first. Then, a part of the data voltage is divided from the secondary sub pixel through the voltage-dividing capacitor, so as to reduce the data voltage therein. The data voltage of the main sub pixel remains the same, so that the brightness of the secondary sub pixel is lower than that of the main sub pixel.

In the array substrate according to the present disclosure, the capacitance of the voltage-dividing capacitor of the sub pixel unit in the compensation region is smaller as compared with that in the non-compensation region. Thus, the data voltage divided from the secondary sub pixel by the voltage-diving capacitor is relatively small, and thus the remaining data voltage in the secondary sub pixel is relatively high. In this way, the brightness displayed by the secondary sub pixel is relatively high, and therefore the brightness of the entire sub pixel unit is relatively high. Consequently, an array substrate provided by the present disclosure can enable the sub pixel unit in the compensation region (i.e., the region with a decreased aperture ratio) to display a higher brightness than the sub pixel unit in the non-compensation region (i.e., the region with normal aperture ratio), so that the brightness of the compensation region can be close to that of the non-compensation region, thereby solving the technical problem of dark area on both sides of the curved display device.

Other features and advantages of the present disclosure will be further explained in the following description and partially become obvious therefrom, or be understood through the embodiments of the present disclosure. The objectives and advantages of the present disclosure will be achieved through the structure specifically pointed out in the description, claims, and the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to clarify the technical solutions of the embodiments of the present disclosure, the drawings relating to the embodiments will be explained briefly:

FIG. 1 schematically shows a part of an array substrate according to Example 1 of the present disclosure;

FIG. 2 shows an equivalent circuit diagram of the sub pixel units of the array substrate according to Example 1 of the present disclosure; and

FIG. 3 schematically shows the array substrate according to Example 1 of the present disclosure.

DETAILED DESCRIPTION OF THE EMBODIMENTS

The present disclosure will be explained in details with reference to the embodiments and the accompanying drawings, whereby it can be fully understood how to solve the technical problem by the technical means according to the present disclosure and achieve the technical effects thereof, and thus the technical solution according to the present disclosure can be implemented. It is important to note that as long as there is no structural conflict, all the technical features mentioned in all the embodiments may be combined together in any manner, and the technical solutions obtained in this manner all fall within the scope of the present disclosure.

The present disclosure provides an array substrate comprising a number of sub pixel units arranged as an array, each sub pixel unit comprising a main sub pixel, a secondary sub pixel, and a voltage-dividing capacitor. Said array substrate is divided into a compensation region and a non-compensation region, and the capacitance of the voltage-dividing capacitor of the sub pixel unit in the compensation region is smaller than that of the voltage-dividing capacitor of the sub pixel unit in the non-compensation region.

The compensation region on the array substrate according to an embodiment of the present disclosure is a region where dislocation occurs between the array substrate and the color film substrate, i.e. the region having a decreased aperture ratio; and the rest region of the panel having a normal aperture ratio is the non-compensation region. During displaying, the main sub pixel and the secondary sub pixel in each sub pixel unit of the array substrate are charged with the same data voltage first. Then, a part of the data voltage is divided from the secondary sub pixel through the voltage-dividing capacitor, so as to reduce the data voltage therein. The data voltage of the main sub pixel remains the same, so that the brightness of the secondary sub pixel is lower than that of the main sub pixel.

In the array substrate according to an embodiment of the present disclosure, the capacitance of the voltage-dividing capacitor of the sub pixel unit in the compensation region is smaller as compared with that in the non-compensation region. Thus, the data voltage divided from the secondary sub pixel by the voltage-diving capacitor is relatively small, and thus the remaining data voltage in the secondary sub pixel is relatively high. In this way, the brightness displayed by the secondary sub pixel is relatively high, and therefore the brightness of the entire sub pixel unit is relatively high. Consequently, an array substrate provided by an example according to the present disclosure can enable the sub pixel unit in the compensation region (i.e., the region with a decreased aperture ratio) to display a higher brightness than the sub pixel unit in the non-compensation region (i.e., the region with normal aperture ratio), so that the brightness of the compensation region can be close to that of the non-compensation region, thereby solving the technical problem of dark area on both sides of the curved display device.

EXAMPLE 1

The array substrate according to Example 1 of the present disclosure comprises a number of sub pixel units arranged as an array. As shown in FIGS. 1 and 2, each sub pixel unit comprises a main sub pixel 1, a secondary sub pixel 2, and a voltage-dividing capacitor (Cst0) 3. The array substrate is divided into a compensation region 100 and a non-compensation region 200. The capacitance of the voltage-dividing capacitor 3 in the compensation region 100 is smaller than that of the voltage-dividing capacitor 3 in the non-compensation region 200.

As shown in FIG. 3, in Example 1, the compensation 100 is the region where dislocation occurs between the array substrate and the color film substrate, i.e. the region having a decreased aperture ratio, and the rest region having a normal aperture ratio is the non-compensation region 200. After the array substrate and the color film substrate are assembled and bent into a curved liquid crystal panel, dislocation between the array substrate and the color film substrate would occur on both sides of the curved liquid crystal panel. Therefore, the region with a decreased aperture ratio is also located at both sides of the curved liquid crystal panel. Because the array substrate and the color film substrate are secured together by frame glue at the edges thereof, dislocation would barely occur around the edges of the curved liquid crystal panel, thus enabling the region having a decreased aperture ratio elliptical. Therefore, according to Example 1, the compensation region 100 is also located at both sides of the array substrate with an elliptical shape. The rest of the panel is the non-compensation region 200, which includes a central portion and edges of the array substrate.

As shown in FIGS. 1 and 2, the array substrate according to Example 1 of the present disclosure further comprises a first gate line (Gate1) 41, a second gate line (Gate2) 42, and a common electrode line (Com) 5 provided for each row of sub pixel units, as well as a data line (Data) 6 provided for each column of sub pixel units. A voltage-dividing electrode 30 is arranged in each sub pixel unit, and said voltage-dividing capacitor Cst0 is formed by the overlapping portion between the voltage-dividing electrode 30 and the common electrode line 5. The first gate line 41, the second gate line 42, and the common electrode line 5 are arranged in the same layer, thus being formed in the same patterning step; and the data line 6 and the voltage-dividing electrode 30 are arranged in the same layer, thus being formed in the same patterning step.

According to Example 1, the area of the voltage-dividing electrode 30 in the compensation region 100 is smaller than that of the voltage-dividing electrode 30 in the non-compensation region 200, rendering the capacitance of the voltage-dividing capacitor Cst0 in the sub pixel unit in the compensation region 100 relatively small.

Furthermore, in Example 1, each sub pixel unit is provided with a first switching element T1, a second switching element T2, a third switching element T3, a main pixel electrode 10 located in a main sub pixel 1, and a secondary pixel electrode 20 located in a secondary sub pixel 2. T1, T2, and T3 are preferably all thin film transistors (TFT). A main liquid crystal capacitor Clc1 can be formed by the main pixel electrode 10 and common electrode (not shown) of the color film substrate, and a main storage capacitor Cst1 can be formed by an overlapping portion between the main pixel electrode 10 and the common electrode line 5. A secondary liquid crystal capacitor Clc2 can be formed by the secondary pixel electrode 20 and the common electrode of the color film substrate, and a secondary storage capacitor Cst2 can be formed by an overlapping portion between the secondary pixel electrode 20 and the common electrode line 5.

As shown in FIGS. 1 and 2, T1 is connected to the first gate line 41 with its gate electrode, to the data line 6 with its source electrode, and to the main pixel electrode 10 with its drain electrode. T2 is connected to the first gate line 41 with its gate electrode, to the data line 6 with its source electrode, and to the secondary pixel electrode 20 with its drain electrode. T3 is connected to the second gate line 42 with its gate electrode, to the secondary pixel electrode 20 with its source electrode, and to the voltage-dividing electrode 30 with its drain electrode.

During displaying, at first, the first gate line 41 is turned on and the second gate line 42 is turned off, so that T1 and T2 are conductive and T3 is non-conductive. At the same time, the data line 6 charges the main pixel electrode 10 and the secondary pixel electrode 20 with the same data voltage respectively through T1 and T2, so that Clc1, Cst1, Clc2, and Cst2 have the same voltage. Then, the first gate line 41 is turned off and the second gate line 42 is turned on, so that T1 and T2 are non-conductive and T3 is conductive. By means of which, Cst0 would divide part of the data voltage of the secondary pixel electrode 20 through T3, lowering the data voltage thereof, such that the voltage of Clc2 and Cst2 is decreased while the voltage of Clc1 and Cst1 remains unchanged. In this case, the voltage of Clc2 is lower than the voltage of Clc1, rendering the brightness of the secondary sub pixel 2 lower than that of the main sub pixel 1. Besides, since the angles of deflection of the liquid crystals in the main sub pixel 1 and in the secondary sub pixel 2 are different from each other, the visual angle of the display panel can be enlarged.

In the array substrate according to an embodiment of the present disclosure, the capacitance of Cst0 of the sub pixel unit in the compensation region 100 is relatively small as compared with that in the non-compensation region 200, thus the data voltage divided by Cst0 from the secondary pixel electrode 20 is relatively small. As a result, the remaining voltage of Clc2 is relatively high, and the brightness of the secondary sub pixel 2 is relatively high, rendering the brightness of the entire sub pixel unit relatively high. Consequently, an array substrate provided by an embodiment according to the present disclosure can enable the sub pixel unit in the compensation region 100 (i.e., the region with decreased aperture ratio) to display a higher brightness than the sub pixel unit in the non-compensation region 200 (i.e., the region with normal aperture ratio), so that the brightness of the compensation region can be close to that of the non-compensation region 200, thereby solving the technical problem of dark area on both sides of the curved display device.

When an array substrate is designed and manufactured, the variation of aperture ratio of the compensation region 100 can be calculated based on the offset of the dislocation between the array substrate and the color film substrate. Accordingly, the brightness increase needed by the compensation region 100 can be calculated based on the variation of aperture ratio, thereby obtaining the required area of the voltage-dividing electrode 30 in the sub pixel unit of the compensation region 100. An array substrate designed and manufactured according to the thus-obtained area of the voltage-dividing electrode 30 can well compensate the adverse effect brought about by the decreased aperture ratio caused by the dislocation between the array substrate and the color film substrate, thereby realizing uniform brightness over the curved display device.

EXAMPLE 2

The present disclosure further provides a curved display device, which can be a curved television or a curved display, etc. Said curved display device comprises a color film substrate, and an array substrate according to Example 1.

The curved display device according to Example 2 comprises the same technical features as the array substrate according to Example 1, thus can solve the same technical problem and achieve the same technical effect.

Preferably, the curved display device is of vertical alignment (VA) type. In a VA type curved display device, by dividing each sub pixel into a main sub pixel and a secondary sub pixel and configuring the liquid crystals in the main sub pixel and the secondary sub pixel with different angles of deflection, the visual angle of the curved display device can be enlarged.

In Example 2, because the liquid crystal capacitance of the secondary sub pixels in the compensation region is different from that of the secondary sub pixels in the non-compensation region, the angles of deflection of the liquid crystals in the secondary sub pixels are also different, thereby further enlarging the visual angle of the curved display device.

The above embodiments are described only for better understanding, rather than restricting, the present disclosure. Any person skilled in the art can make amendments to the implementing forms or details without departing from the spirit and scope of the present disclosure. The scope of the present disclosure should still be subjected to the scope defined in the claims. 

1. An array substrate, comprising a number of sub pixel units arranged as an array, each sub pixel unit comprising a main sub pixel, a secondary sub pixel and a voltage-dividing capacitor, wherein said array substrate is divided into a compensation region and a non-compensation region, and the capacitance of the voltage-dividing capacitor of the sub pixel unit in the compensation region is smaller than that of the voltage-dividing capacitor of the sub pixel unit in the non-compensation region.
 2. The array substrate according to claim 1, wherein the compensation region is disposed at both sides of the array substrate.
 3. The array substrate according to claim 2, wherein the compensation region is in the shape of an ellipse.
 4. The array substrate according to claim 1, further comprising: a first gate line, a second gate line, and a common electrode line provided for each row of the sub pixel units, and a data line provided for each column of the sub pixel units.
 5. The array substrate according to claim 4, wherein a voltage-dividing electrode is arranged in each sub pixel unit, and said voltage-dividing capacitor is formed by the overlapping portion between the voltage-dividing electrode and the common electrode line.
 6. The array substrate according to claim 5, wherein the area of the voltage-dividing electrode of the sub pixel unit in the compensation region is smaller than that of the voltage-dividing electrode of the sub pixel unit in the non-compensation region.
 7. The array substrate according to claim 5, wherein each sub pixel unit further comprises a first switching element, a second switching element, a third switching element, a main pixel electrode disposed inside the main sub pixel, and a secondary pixel electrode disposed inside the secondary sub pixel, said first switching element is connected to the first gate line with its gate electrode, and to the data line with its source electrode, and to the main pixel electrode with its drain electrode, said second switching element is connected to the first gate line with its gate electrode, and to the data line with its source electrode, and to the secondary pixel electrode with its drain electrode, and said third switching element is connected to the second gate line with its gate electrode, and to the secondary pixel electrode with its source electrode, and to the voltage-dividing electrode with its drain electrode.
 8. The array substrate according to claim 7, wherein the first switching element, the second switching element, and the third switching element are all thin film transistors.
 9. A curved display device, comprising a color film substrate and an array substrate, wherein said array substrate comprises a plurality of sub pixel units arranged as an array, each sub pixel unit comprising a main sub pixel, a secondary sub pixel and a voltage-dividing capacitor, and said array substrate is divided into a compensation region and a non-compensation region, and the capacitance of the voltage-dividing capacitor of the sub pixel unit in the compensation region is smaller than that of the voltage-dividing capacitor of the sub pixel unit in the non-compensation region.
 10. The curved display device according to claim 9, wherein the compensation region is disposed at both sides of the array substrate.
 11. The curved display device according to claim 10, wherein the compensation region is in the shape of an ellipse.
 12. The curved display device according to claim 9, further comprising a first gate line, a second gate line, and a common electrode line provided for each row of the sub pixel units, and a data line provided for each column of the sub pixel units.
 13. The curved display device according to claim 12, wherein a voltage-dividing electrode is arranged in each sub pixel unit, and said voltage-dividing capacitor is formed by the overlapping portion between the voltage-dividing electrode and the common electrode line.
 14. The curved display device according to claim 13, wherein the area of the voltage-dividing electrode of the sub pixel unit in the compensation region is smaller than that of the voltage-dividing electrode of the sub pixel unit in the non-compensation region
 15. The curved display device according to claim 13, wherein each sub pixel unit further comprises a first switching element, a second switching element, a third switching element, a main pixel electrode disposed inside the main sub pixel, and a secondary pixel electrode disposed inside the secondary sub pixel, said first switching element is connected to the first gate line with its gate electrode and to the data line with its source electrode, and to the main pixel electrode with its drain electrode, said second switching element is connected to the first gate line with its gate electrode, and to the data line with its source electrode, and to the secondary pixel electrode with its drain electrode, and said third switching element is connected to the second gate line with its gate electrode, and to the secondary pixel electrode with its source electrode, and to the voltage-dividing electrode with its drain electrode.
 16. The curved display device according to claim 15, wherein the first switching element, the second switching element, and the third switching element are all thin film transistors.
 17. The curved display device according to claim 9, wherein said curved display device is a vertical alignment type display device. 